New Processors

INTEL
The X2's two CPU cores share a single, unified system request queue and a crossbar that connects them to the on-chip memory controller and HyperTransport link for I/O. This arrangement should allow the processor's two cores optimal use of available resources without too much contention. The cores themselves are able to communicate with one another through the system request interface. Cache coherency updates and any data transfers between the two cores' caches will happen over this high-speed, on-chip data path.Despite what you see in the diagram above, the Athlon 64 X2 has only one HyperTransport link, because it will only be used in single-socket systems.The pricier Opterons get more than one link for use in multi-socket configs. That leaves the Athlon 64 X2 with 6.4GB/s of peak theoretical memory bandwidth and 8GB/s of peak theoretical I/O throughput. At 14.4GB/s total, that's well more than the 6.4GB/s peak throughput of Intel's 800MHz front-side bus.Because Intel's dual-core Smithfield chip has no internal data links between its two cores, all memory accesses, system I/O, and cache coherency updates must happen over its shared front-side bus. That leaves the Athlon 64 X2 with a sizeable bandwidth advantage, at least in theory.The two chips are very comparable in terms of size and transistor count, though. With 1MB of L2 cache per core, the X2—code-named "Toledo" on AMD's roadmaps—packs roughly 230 million transistors into a die that's 199 mm2. Intel's Smithfield is strikingly similar at about 233 million transistors and 206 mm2.